|
型号 |
输出电压范围 |
输出电流 |
桥数 |
接口 |
逻辑输入电压范围 |
驱动电机类型 |
封装 |
|
A3959 |
9.5V~50V |
3.0A |
单全桥 |
并行 |
4.5V~5.5V |
直流有刷 |
DIP24，SOIC-24，eTSSOP-28 |
A3959
DMOS 全桥式 PWM 电动机驱动器
特点
- ±3 安培 50 伏特输出率
- 低 RDS(on) 输出（270 毫欧，典型）
- 混合、快与慢电流-衰减模式
- 对低功率耗散同步整流
- 内部欠压锁定 (UVLO) 及过热关机电路
- 交叉电流保护
- 数字 PWM 计时内部振荡器
描述
为直流电动机的脉宽调制 (PWM) 电流控制而设计，A3959SB、A3959SLB 及 A3959SLP 能够将输出电流至±3 安培，工作电压为 50 伏。内部固定停机时间脉宽调制 (PWM) 电流控制计时电路可通过控制输入进行调整，使之可在低、快及混合电流衰减模式下工作。
“相位”与“启用”输入端用来控制外部应用 PWM 控制信号的直流电动机的速度与方向。内部同步整流控制电路用来减少脉宽调制 (PWM) 操作时的功率消耗。
内部电路保护包括因滞后引起的过热关机、电源及充电泵的过压监视及交叉电流保护。不需要特别的加电排序。
A3959SB/SLB/SLP 是可供选择的三种功率封装，即带铜质蝙蝠翼状片的 24 引脚塑料双列直插式封装 (DIP)（封装后缀为'B'）、带铜质蝙蝠翼状片的 24 引脚塑料 SOIC（封装后缀为'LB'）以及带外露隔热盘（后缀为'LP'）的薄（<1.2 毫米）的 28 引脚塑料 TSSOP 。在任何情况下，功率标签处于地电位之下，不需要电绝缘。每种封装都是无铅产品，且引脚框采用 100% 雾锡电镀。
功能方框图
A3959
DMOS Full-Bridge PWM Motor Driver
Features
- ±3 A, 50 V Output Rating
- Low rDS(on) Outputs (270 milliohms, Typical)
- Mixed, Fast, and Slow Current-Decay Modes
- Synchronous Rectification for Low Power Dissipation
- Internal UVLO and Thermal-Shutdown Circuitry
- Crossover-Current Protection
- Internal Oscillator for Digital PWM Timing
Description
Designed for pulse-width modulated (PWM) current control of dc motors, the A3959SB, A3959SLB, and A3959SLP are capable of output currents to ±3 A and operating voltages to 50 V. Internal fixed off-time PWM current-control timing circuitry can be adjusted via control inputs to operate in slow, fast, and mixed current-decay modes.
PHASE and ENABLE input terminals are provided for use in controlling the speed and direction of a dc motor with externally applied PWM-control signals. Internal synchronous rectification control circuitry is provided to reduce power dissipation during PWM operation.
Internal circuit protection includes thermal shutdown with hysteresis, undervoltage monitoring of supply and charge pump, and crossover-current protection. Special power-up sequencing is not required.
The A3959SB/SLB/SLP is a choice of three power packages, a 24-pin plastic DIP with a copper batwing tab (package suffix 'B'), a 24-lead plastic SOIC with a copper batwing tab (package suffix 'LB'), and a thin (<1.2 mm) 28-lead plastic TSSOP with an exposed thermal pad (suffix 'LP'). In all cases, the power tab is at ground potential and needs no electrical isolation. Each package is available in a leadfree version (100% matte tin leadframe).
Functional Block Diagram